Real-Time PCB Defect Detection System

Overview

This system provides fully automated optical inspection (AOI) for SMT (Surface Mount Technology) printed circuit boards. It replaces traditional rule-based systems with a learned model that generalizes across board variants without re-programming.

Problem Statement

Traditional AOI systems require manual threshold tuning for each new board design — a process taking 2–3 days per product. Our goal was a system that learns from a small annotated dataset (500–1000 images) and generalizes to board variants unseen during training.

Architecture

The detection backbone is a custom EfficientDet-D3 variant with a modified BiFPN neck. Key design choices:

Tile-based inference: Each board is split into 512×512 overlapping tiles, enabling detection of 0.1 mm solder bridges.
TTA (Test-Time Augmentation): Horizontal/vertical flips averaged during inference to reduce false negatives.
Two-stage refinement: A lightweight classifier confirms detections to reduce false positives.

Mathematical Foundation

The non-maximum suppression (NMS) step uses a soft-NMS variant where the confidence score $s_i$ of overlapping boxes is decayed exponentially:

s_i = s_i \cdot e^{-\frac{\text{IoU}(M, b_i)^2}{\sigma}}

where $M$ is the detected box, $b_i$ is a candidate, and $\sigma$ controls the decay rate. This outperforms hard NMS by ~1.5% mAP on clustered defects.

Results

| Metric | Value | |---|---| | Detection Accuracy | 99.8% | | False Positive Rate | 0.05% | | Throughput | 120 boards/min | | Inference Latency | < 8 ms (TensorRT FP16) |

Deployment